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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

How was fpga.dts on de10-standard GHRD generated?

Hi, I sent a support question to Terasic but while I'm waiting for the response, I was wondering if anyone on this forum knew how the fpga.dts file in the Demonstration/SoC_FPGA/DE10_Standard_G...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

Hi Anand,

I was able to run the dtc program where the input is a dtb file and the output is a dts file. From there I can get some clues about what was part of the dts. What I learned from my correspondence with Terasic support is that Qsys by itself doesn't generate everything needed for a device tree. One or more board files are part of the equation, too. For example, every time I loaded Linux Console to my DE10-Standard board, I noticed that i2c0-mux was present under /sys/class/leds. However, using the board files that came with my DE10-Standard board and the sopcinfo from a project, i2c0-mux was never present in /sys/class/leds.

I've now figured out how to edit my board files to include the i2c0-mux.

Thanks for the links. I will review them.

Regards,

Raul
greenlantern01's avatar
greenlantern01
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

Hi Raul,

Kindly share if you still have, the links you referred to, or any other information medium you used, to learn to edit the dts files according to your qsys.

Thanks