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Honored Contributor
Honored ContributorHow was fpga.dts on de10-standard GHRD generated?
Hi, I sent a support question to Terasic but while I'm waiting for the response, I was wondering if anyone on this forum knew how the fpga.dts file in the Demonstration/SoC_FPGA/DE10_Standard_G...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- I'm having trouble understanding what generates the fpga.dts because it looks like I'll need it in order to control LEDs and use switches and buttons since the soc_system.dts doesn't contain that kind of information. --- Quote End --- How you have designed Qsys or what all components are used? Information from sopcinfo file are used to generate the device tree. Refer below links. https://rocketboards.org/foswiki/documentation/gsrdv141devicetreegenerator https://rocketboards.org/foswiki/documentation/gsrd131devicetreegenerator https://www.alteraforum.com/forum/attachment.php?attachmentid=15039 https://www.alteraforum.com/forum/attachment.php?attachmentid=15040 Let me know if this has helped resolve the issue you are facing or if you need any further assistance. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
