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Altera_Forum
Honored Contributor
8 years agoHow was fpga.dts on de10-standard GHRD generated?
Hi, I sent a support question to Terasic but while I'm waiting for the response, I was wondering if anyone on this forum knew how the fpga.dts file in the Demonstration/SoC_FPGA/DE10_Standard_G...
Altera_Forum
Honored Contributor
8 years agoHi,
Steps to generate device tree (dts/dtb) Dts = can view Dtb = binary, cannot view. 1. Compile Quartus 2. Get handoff folder / handoff_isw 3. Get <projectname>.sopcinfo 4. Use sopc2dts tool to convert # sopc2dts Xml file, from customer board designer. 5. sopc2dts --input soc_system.sopcinfo --output socfpga_new.dtb --type dtb --board soc_system_board_info.xml --board hps_common_board_info.xml --bridge-removal all –clocks For more information check the link http://www.alterawiki.com/wiki/sopc2dts#intro https://rocketboards.org/foswiki/documentation/gsrddevicetreegenerator Let me know if this has helped resolve the issue you are facing or if you need any further assistance. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)