Forum Discussion
CAlex
Contributor
ContributorHow to use on chip memory by HPS baremetal
Hi, it's based on CycloneV soc dev kit, the on chip memory was linked to H2F AXI(128bit wide). So I set the OCMemory as 128 bit and writeable RAM. In the HPS code I setup the FPGA image, openned ...
EBERLAZARE_I_Intel
Regular Contributor
Regular ContributorHi,
Can you check this out first?:
Also, what do you mean by no 4? Do you want to have for example, in FPGA user mode and access the OCRAM while it is being accessed by the HPS?
CAlexContributor
ContributorHi，
this OCRAM meant to be the GHRD On Chip Memory II IP.
So basically it is a FPGA IP, my object is let HPS send in a buffer and meanwhlie FPGA continue reading from this Memory.
Reguards.
