Forum Discussion
Occasional ContributorHow to use HPS Ethernet to transmit FPGA generated data to another board
Hi,
You need to transfer data from FPGA to HPS DDR memory using the DMA or FIFO and the F2H bridge. This will be in your Verilog code.
In software linux, you need to write the linux userspace code for reading data from DDR and fill the buffer and send over HPS ethernet.
For ethernet in linux you need to write the socket programming to build the TCP/IP or UDP application over ethernet for server or client on board.
We don't have this example code but it is generic way of writing the linux TCP/IP app. For reference you can refer below link
https://www.geeksforgeeks.org/tcp-server-client-implementation-in-c/
For HPS & FPGA data transfer, please refer the below link.
https://github.com/robertofem/CycloneVSoC-examples/tree/master/Linux-modules/DMA_PL330_LKM_basic
Let me know if you have any other query on this topic.
Regards
Tiwari
Frequent ContributorHi,
I believe your enquiry has been answered. With that, I now transition this thread to community support.
Thank you.
Best Regards,
Tiwari
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
Occasional ContributorThank you for your help. I want to use FIFO to receive data from FPGA, then use Avalon MM Pipeline Bridge to send the data to F2H AXI bus, and then write a program on Linux to read and send the data. I don't know if this is okay
