Hi, I'm a rookie of the SoCFPGA and I wanted to use it to build a FSM in HPS.I have already finished building the system design as "User Manu" said and get the hps_0.h header file out.I built my system based on the GHRD, and added a timer(100ms) using the Altera IP.Now I want to play with it,yet there are little information about a timer or an interrupt working on SOC.The board I'm using is a DE10-standard board.Could anyone show me where to start?And it will be better if you can provide a document/example on how to play with the Altera IP on C.Thank you for your help.

Hi I did not personally tried out an interrupt example before.I think the discussion here is what you are looking for:https://community.intel.com/t5/Programmable-Devices/Cyclone-V-Interrupt-Handling/td-p/160759?profile.language=deWe could try it together and discuss it as we go along.RegardsJingyang, Teh

Thanks for reply,I'll go through this

Hi Sorry to inform you that, I am taking annual leave next week.Please expect some delay in my reply.Thank you very much in advance!RegardsJingyang, Teh

Hi,Do you have any update from your side?

Hi, there I linked the IRQ signal from the timer to the HPS and mmBridge like GHRD did to their button PIO ips. Downloaded and ran the fpga design on my board and it turns out worked well. So I believe the hardware part is done for now. The issue is on software, I tried to figure out how to request, call and disable an IRQ through C,and I finished reading through the MPU part in Cyclone V handbook and IP handbook for Altera. It terns out to be little helpful. Now I'm reading the .dts file from the GHRD and the following is the capture of the button ip. Also I found some information on hps_0.h, it's a define of an irq id as figuer 2 discribed. But other than that I don't know what to do next. Here are my list of questions: 1. I uploaded the fpga design to my board through the JTAG port and worked well(I made the led blink), is that mean the hardware design is done? 2.On softwware design, what should I do next? 3.When I used the Altera IP, I usually don't know how to link the parts, for example: there is a timer ip,thimer------->mmBridge------>f2h_bridge ,and I linked it to the fpga_only bridge, but I don't know why I need to link to these bridges, do you guys have any explination doc or turtour resources for qsys? that's all, thanks for your reply BTW. reguards.

How to setup a time interrupt on de10 standard using C language

36 Replies

tehjingy_Altera
Regular Contributor
3 years ago
Hi Alex

Did you manage to test out the suggested changes?

Regards
Jingyang, Teh
CAlex
Contributor
3 years ago
Hi,

I'm a little busy on other things right now,

please give me a couple of days.

Reguards.
tehjingy_Altera
Regular Contributor
3 years ago
Hi Alex

Did you managed to test out the device tree?

Regards
Jingyang, Teh
tehjingy_Altera
Regular Contributor
3 years ago
Hi Alex

Do you still need some extra time for this case?

Regards
Jingyang, Teh
tehjingy_Altera
Regular Contributor
3 years ago
Hi

Since there are no feedback for this thread, I shall set this thread to close pending. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

If you happened to close this thread you might receive a survey. If you think you would rank your support experience less than 10 out of 10, please allow me to correct it before closing or if the problem can’t be corrected, please let me know the cause so that I may improve your future service experience.

Regards
Jingyang, Teh

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How to setup a time interrupt on de10 standard using C language

36 Replies

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