Forum Discussion
Sivakumar_S
New Contributor
New ContributorHow to read differential data in double-datarate mode using differential clock for an RF transceiver
Hi , In my design there is a RF transceiver (with Arria10 SoC), which has differential data which is in double data rate mode. Also the data clock (3.84MHz)and frame clock is of differential mode. ...
ZiYing_Intel
Frequent Contributor
Frequent ContributorHi,
I think you can try to use the PHY Lite for Parallel Interfaces Intel FPGA IP as it also can support for the double data rate. For further information about this IP, please do refer the UG in link below, https://www.intel.com/content/www/us/en/docs/programmable/683716/23-1/about-the-ip.html
Best regards,
Zi Ying
