New ContributorQuartus Prime Pro 18.1.0
Being new to FPGAs I managed to create and test a simple configuration on the dev-kit-board, using Quartus Programmer. Unfortunately I couldn't find a detailed description on how to program the configuration to the EPCQL or to the NOR-Flash on the board.
Thanks!
Frequent ContributorHi CSchw,
In order to access the EPCQL, first you need to make sure the MSEL pins are set to ASx1/x4 mode . You should be able to check this dip SW1 seetings under Table 8. Configuration Mode Settings from the Cyclone 10 GX dev kit user guide from the link below:
Then you need to use the SFL (Serial Flash Loader IP) method to program the EPCQL device via Quartus programmer. You can refer to the AN370 on the steps to generate and program the .jic programming file suign SFL method:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an370.pdf
Otherwise you can check out the how to video on this too:
https://www.youtube.com/watch?v=dPSFCGNQOCU
Regards,
Nooraini
New ContributorHi NYusof,
many thanks! It works fine now!
New ContributorOK now how about the CFI flash process? Convert SOF to POF, say it's 2Gb CFI and it seems to understand that it's FPP X 32 mode now. Erase process seems to work but the actual programming fails on the first location. MSEL is 000 (S1.1 and S1.2 are ON, down, so closed, so zeros.
