Forum Discussion
BXia
Occasional Contributor
Occasional ContributorHow to boot board from EPCS with NIOSII code running from SDRAM?
Hi,
I found a demo DE0_NANO_SDRAM_Nios_Test from this topic: https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/Can-t-get-DE0-nano-board-to-boot-from-EPCS-with-NIOSII-code/td-p/698479 , wh...
hareesh
Frequent Contributor
Frequent ContributorHi,
is it your own design or downloaded from any where?
because SDRAM controller not showing in my IP catalog. how did you add that IP in design
Thanks,
BXiaHi hareesh,
Actually the design is provided by Intel as I said in my first thread, this is the original source: https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/Can-t-get-DE0-nano-board-to-boot-from-EPCS-with-NIOSII-code/td-p/698479
And I opened the design with Quartus lite v18.1, I can see the SDRAM controller without any problem.
