How high frequency can DE2 board reach?

The interconnect delay on the DE2 board is maximum a few nsec.

The SPI device on the DE2 board requires a minimum clock period of 80 nsec. So board interconnect delay is only a few percent of this.

You have to design your circuit in such a way that it generates signals according to the circuit you want to interface with. Given that you use a system clock frequency of 50MHz or higher on your DE2, making an interface to a SPI device should not be constraint by delays in your FPGA or on your board. The maximum speed of your FPGA and board should be more than enough for SPI.