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ivar_svendsen
New Contributor
New ContributorFPGA to HPS Peripheral address mapping
Hello,
I am looking into the Cyclone 5 SoC.
The hard processor system (HPS) have a peripheral region from 0xFC000000 - 0xFFFFFFFF.
This region is accessible to the FPGA fabric through the FPGA...
ivar_svendsenNew Contributor
New ContributorYes, I want to access HPS peripherals from the FPGA.
I have learned that the "Address Span Extender" component is doing what I want: To map multiple windows into the HPS address space from the FPGA.
I think this has solved the challenge.
