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mamuneeb332's avatar
mamuneeb332
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3 years ago
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Facing issues with External Memory Interface IP with DDR4

Hello! I am trying to connect DDR4 with my Arria 10 FPGA with the help of EMIF IP. I had gone through the example design. I had followed the complete steps from Example Guide for building the examp...
mamuneeb332's avatar
mamuneeb332
Icon for New Contributor rankNew Contributor
3 years ago

Thank you sir for your reply.
Sorry for bothering again and again.
what do you mean by seeing them in a simulation ? (Do you mean Modelsim Simulations?)
Could you please tell the steps to see the signals in simulation.

Thank you.