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ContributorExample design: Agilex I-series devkit not detected by lspci (stuck in S_CFG_LINKWD_START)
I found the issue.
The default position for the SW3 is defined in the UG as OFF/ON/ON/OFF, to use the refclk from the connector.
The board was received with OFF/OFF/OFF/OFF, to use the on-board refclk.
I set the SW3 as documented and it's now enumerated by the bios and seen in lspci.
Why it doesn't work using the on-board refclks?
Devkit: DK-DEV-AGI027RES
Serial number: AGIPCIE8000248
Regards,
Regular ContributorHi,
Initially, I suspend R-Tile's different behavior on different Motherboard may be related to Preset negotiation between Motherboard and R-Tile.
Is okay, let see the result after you compile the file.
Looking forward to hear back from you.
Regards,
Wincent_C_Intel
alexislmsIt compiled successfully but the Programmer fails at 5%:
Error(18950): Device has stopped receiving configuration data Error(18948): Error message received from device: External hardware access error. (Subcode 0x0032, Info 0x00040008, Location 0x00001800) Error(22248): Detected a PMBUS error during configuration. Potential errors: VID setting is incorrect in the Intel Quartus Prime project. The target device fails to communicate to a smart regulator or PMBUS master on a board. Error(209012): Operation failedJust in case, I attached the archive of the example design (2. in my question) generated with 22.1.
Regards,
- Wincent_Altera
Hi,
The example work fine in our server, in this case error might happen on the settings.
- Can you please, remove the card from the PCIe slot. Make sure the PCIe edge connector and the slot are clean. Try re-inserting and ensure the card is fully seated in the PCIe slot.
- Have you rebooted Linux after loading the .sof?
- For the Error (22248): Can you please check if the VID setting is appropriate ?
You may refer the guide : https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/agilex/ug-ag-pwr.pdf#pag... - If not workable, Can you please try out other Agilex Design Example and see is it the error still the same ?
https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/design-store.html?s=Newest&f:guidetm83741EA404664A899395C861EDA3D38B=%5BIntel%C2%AE%20Agilex%E2%84%A2%20FPGAs%20and%20SoC%20FPGAs%5D
Looking forward to hear back from you. Please let me know if any other further clarification is needed.
Regards,
Wincent_C_Intel
