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Niko3's avatar
Niko3
Icon for Occasional Contributor rankOccasional Contributor
10 months ago
Solved

error in ModelSim?

I am using Quartus II 64-Bit Version 13.0.1 to change a design for a MAX3000a series chip and I want to simulate it with ModelSim-Altera which is contained in the Quartus II software. Simulation fo...
Fpga Devkit
  • ShengN_altera's avatar
    ShengN_altera
    10 months ago

    Hi,


    Inside the testbench myProject_tb_1.v, make sure the module name also myProject_tb_1.


    Thanks,

    Regards,

    Sheng


ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
10 months ago

Hi,


You may re-arrange the sequence of the wire and reg in myProject_tb.v


Thanks,

Regards,

Sheng


Niko3's avatar
Niko3
Icon for Occasional Contributor rankOccasional Contributor
10 months ago

Hi,

I'm here again with a new problem, sorry.

I wanted to generate several test benches. So, I started again with the wave editor.

  1. in modelsim deleted wave window
  2. with text editor modified in wave.do the lines "wave modify ..." for the inputs DI0 ... DI3 to get new input data
  3. in modelsim loaded the modified wave.do: File / Load / Macro File...
  4. in modelsim exported the new testbench: File / Export / Waveform... with the new name myProject_tb_1
  5. closed modelsim
  6. in Quartus II changed testbench: Assignments / Settings / Simulation / click on Test Benches...

then deleted old test bench "myProject_tb"

added new test bench "myProject_tb_1"

7. started modelsim: Tools / Run Simulation Tool / Gate Level Simulation...

error deleting "msim_transcript": permission denied

8. closed Quartus II and modelsim

9. deleted msim_transcript

10. started Quartus II

11. started modelsim: Tools / Run Simulation Tool / Gate Level Simulation...

# ** Error: (vsim-3170) Could not find 'H:/Arduino/Quartus-Projekte/myProject/simulation/modelsim/gate_work.myProject_tb_1'.
#
# Error loading design

12. opened myProject_tb_1.v with text editor and saw that it contained only a few lines

13. deleted test bench in Quartus II

14. repeated steps 1 -- 5

15. now myProject_tb_1.v was ok

16. in Quaartus II added test bench myProject_tb_1

17. started modelsim: Tools / Run Simulation Tool / Gate Level Simulation...

same error as in step 11

Is'nt it possible to use several different test benches and if yes how to do it?