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Miles1's avatar
Miles1
Icon for New Contributor rankNew Contributor
3 years ago

Error during synthesis of MAX 10 FPGA Development Kit sample project 'ddr3x24' in Quartus 20.1.1

I'm using the sample project 'ddr3x24' provided by the MAX 10 FPGA Development Kit. My Quartus version is 20.1.1. However, I'm getting the following error during synthesis. Can you please help me to ...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hello,


I believe the Max 10 sample project ddr3x24 is build in legacy Quartus version.

So you may need to perform IP upgrade first before running compilation process.

You have to make sure that the IP upgrade is running successfully.


Regards,

Adzim