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Marco_Go's avatar
Marco_Go
Icon for New Contributor rankNew Contributor
3 years ago
Solved

DE10LITE SDRAM Example code

Dear Sirs, I did several tests using the de10-lite including using the files that come with the board. As I have no experience, I could not find out if the card is having problems or if I really ...
  • Nurina's avatar
    Nurina
    3 years ago

    Hello Marco,


    You need to check that your RTL code is correct before you solve the timing violation.

    Any changes made to the RTL code could definitely affect the timing performance due to different routing.


    Also, if you require help on timing, please post a new thread as this thread has a different root cause & solution.


    Thank you,

    Regards,

    Nurina


Nurina's avatar
Nurina
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi Marco,


The timing violation is at the SDRAM. Since there is failure to read at the beginning, I believe there is problem in your RTL code. Please allow some time while I try check the RTL simulation on ModelSim.


Thanks,

Nurina


  • Marco_Go's avatar
    Marco_Go
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hi Nurina,

    Alright, I'll be waiting for you.

    regards,

    Marco Gonzaga