Forum Discussion
DE10LITE SDRAM Example code
- 3 years ago
Hello Marco,
You need to check that your RTL code is correct before you solve the timing violation.
Any changes made to the RTL code could definitely affect the timing performance due to different routing.
Also, if you require help on timing, please post a new thread as this thread has a different root cause & solution.
Thank you,
Regards,
Nurina
Hello,
May I know which Quartus version you are using and which OS (Linux/Windows)?
Have you tried this example design? https://www.intel.com/content/www/us/en/design-example/715011/max-10-sdram-nios-test-max10-de10-lite.html
Here is an open sourced SDRAM example design: https://github.com/Arkowski24/sdram-controller
Regards,
Nurina
Hi Nurina,
Thanks for your help.!!!
I use quartus lite for windows version 20.1.0 build 711 and I don't know anything about us.
I'll check the version you uploaded from github.
Regards,
Marco