Forum Discussion
CAlex
Contributor
3 years agoDe10 standard Clock and speed issue
Hi,
I'm a little confused on the clock issues, I'm working on Liunx based system with the debug mode.
I created a flag signal that it will flip in 50us.
I posted the signal from the FPGA to the...
CAlex
Contributor
3 years agoHi,
Okey, I sent you the whole project to you but not the C file on the HPS(Linux).
Please inform me if you need that to figure out what's happend.
Meanwhile I can psot some settings for any one else want to solve this question:
Fig1.Axi Bridge Setting
Fig2. HPS PLL setting
Fig3. System setting, The top one is the cyclone V HPS hps_0
Looking forward to your reply.
reguards.