DDR4 test failluer with BTS

I'm attaching the design here.

This design was generated in Quartus Standard version 22.1.2.

You can follow the steps from the User Guide in section 1.8 and 1.9 to run the design.

https://www.intel.com/content/www/us/en/docs/programmable/683842/21-1-19-2-0/compiling-and-programming-the-emif-design.html

There is a signal tap file that is ready to capture the signals of the DDR4 interface.

You can open Signal Tap Logic Analyzer from the Quartus's Tools tab and click on Run Analysis.

You should get similar result as picture below.

Please share your result of your test for observation.

Thanks,

Adzim