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Avishek's avatar
Avishek
Icon for New Contributor rankNew Contributor
5 months ago

Cyclone V SX-GX connection

Hi everyone,

I am currently modifying an existing design and need to add 10 Ethernet interface signals in SGMII mode to the transceiver bank of the FPGA 5CSXFC6D6. This requires at least 40 data signals (10 interfaces × 4 signals each) to connect to the transceiver pins.

However, these transceiver bank pins are already occupied with signals connecting to another FPGA, 5CGXFC4C6, via GXB signals.

Is there an alternative bank within the 5CSXFC6D6 that I can use to shift the GXB signals coming from the 5CGX FPGA? If so, I could then utilize the original transceiver bank for the Ethernet data signals in SGMII mode.

Thanks in advance for your guidance!

Fpga Devkit

1 Reply

  • JonWay_C_Intel's avatar
    JonWay_C_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    3 months ago

    SGMII requires a line rate of 1.25 Gbps, which means it must utilize the FPGA's transceiver (XCVR) channels. However, the 5CSXFC6D6 device only provides 9 transceiver channels, while you're aiming to implement 10 SGMII interfaces—each needing a dedicated channel. This creates a shortfall of one transceiver channel for your intended design.