Forum Discussion
Cyclone V - Differential Pair Pin Assignment 1.5V PCML fitter error
- 4 years ago
Hi Terra,
I have told you earlier, you cannot directly connect, Please design custom logic to reconstruct the word. First correct your design then try to compile.
Thank you
Kshitij Goel
Hi, I am using Quartus Prime Lite 16.1 version with a Cyclone V dev board called C5G Starter Kit from Terasic. The exact FPGA device is a Cyclone V 5CGXFC5C6F27C7. I am also using the HSMC (High Density mezzanine connector) to hook up an expansion card. The expansion card has HD-SDI BNC connectors In and Out that are routed through the FPGA.
The goal is to short the HSMC_GXB_RX pin to the HSMC_GXB_TX pin in order to make a "straight through" test for the signal. The HD-SDI signal is being generated off the dev boards and, eventually, the FPGA only needs to route the SDI input to one of the two Tx output pairs as a switch.
In Quartus, I cannot find an IP named ALTGXB anywhere in the catalog. On the ALTGXB Intel page it does not say how to install this for a Cyclone V device. Can you help?
I also searched the IP catalog for XCVR but there is nothing named that. I see SDI v16.1? But these are time sensitive blocks so it may be more fancy than what I need? I am looking for a simple buffer to link the GXB_RX pair to the GXB_Tx pins. Thank you.
-Terra