Honored ContributorHave one cuestion when load the NIOS processor inside the FPGA only appear available the clock of 50 Mhz, but the board have another of 125 MHz why can't use that?:)
On-board clocking circuitry ■ Two clock oscillators to support Cyclone III device user logic ■ 50 MHz ■ 125 MHz
Honored Contributorthe 125Mhz is generate by phy.
this clock only works if you take out the reset the phy chip . you can use this clk but you need take care. Franz WagnerHonored ContributorNo it's not generated by the PHY, it's a regular oscillator. Have a look at page 7 of the schematics.
You can use it if you want, it's connected to the A14 pin on the FPGA.Honored ContributorHonored ContributorThere is no risk. It is indeed an oscillator supposed to feed the PHY but you can also use it for other things in your FPGA. Alternatively you can also use a pll on the 50MHz clock to generate other frequencies
