--- Quote Start ---
if the sof you try to programm is broken, the programmer would tell you that and the config done pin wouldn't tell you that the configuration was successful.
--- Quote End ---
If I use a good SOF-File, the error LED is on while programming, then it get's off and the Config Done LED is on and the fpga-program runs.
If I use my non-working SOF-File, it's the same but the Config Done LED is only on for a few millisceonds. Then the Flash_CE_n LED is on and the FPGA loads the factory image.
--- Quote Start ---
or the fpga is not configured via jtag but via on board configuration with the old image. so could you delete the on board configuration image or bring the board into a mode where it does not configure itself from epcs or cfi.
--- Quote End ---
In theory, I could delete the on board configuration image or change the mode. But the question is, why some SOF-Files are working and some not.
--- Quote Start ---
does the same problem exists when you configure via command line ?
--- Quote End ---
I don't know how to do that. I guess you don't mean the NIOS II Command Shell, because I'm not working with NIOS.
Maybe the problem is related to a pll function in my design. I use ALTPLL from MegaWizard Plug-In Manager. And because my FPGA is EP2C35F672C
6N, I can't select speed 8 in this block, I think.
It's still not working, I think that the problem is because of the PLL function. So I removed the pll but it did not help...
Honored Contributor
