Forum Discussion
Altera_Forum
Honored Contributor
18 years agoHi,
I think that you are correct in saying that I suspect that there's no clock (25.175MHz) driving the controller's clock input.......... : This is because there is no 25.175MHz crystal oscillator on the board. You have three ways of generating your required clock. 1) An external piece of circuitry can provide a 25.175MHz clock into the development board through the external clock, EXT CLOCK, input. However since you want to use the onboard clocks this solution will not be suitable for you. 2) You can instantiate a PLL and drive it with the 50MHZ clock and attempt to generate the 25.175MHz clock from that. You can then use this to drive your graphics core. 3) You can change the timing of your graphics core so that it can be driven directly from the 25MHz clock. To do this you need to calculate how many clock cycles are need to complete the back porch, front porch, border etc during the horizontal and vertical scan periods at the new frequency and adjust your graphics core accordingly. ASSIGNMENT tab -> Classic Timing Analyser Settings -> INDIVIDUAL CLOCKS, I'm trying to get a clock to drive the controller'd clock input by tying the clock_in entity clock input (clock_in) to the ClOCK_27 or CLOCK_50 onboard clocks. Once this done, I've chosen 25.175MHZ as the highest frequency from the Default required fmax on the Classic Timing Analyser Setting. By doing this you achieve nothing! It will ensure that you have met the timing constraints but I do not think that it will generate a 2.175MHz clock for you unless I have misunderstood what you are doing. Ben