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RThie6's avatar
RThie6
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6 years ago
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Can't get DE0 nano board to boot from EPCS with NIOSII code running from SDRAM

I have made several attempts to make DE0 nano boot from flash (epcs64) with a Nios II and code running from SDRAM. In the mean time I have tried all tutorials, every trick posted over the several yea...
FawazJ_Altera's avatar
FawazJ_Altera
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hello,

I have done this long time ago. You need to maintain two important things:

1- The clock that feeds the SDRAM should be shifted around -3 nano seconds.

2- Use Older Quartus Programmer version instead of 18.1, for example 15.0

Page 11 of this document shows the PLL time shift to handle the SDRAM timing issue:

ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/17.0/Tutorials/Verilog/DE0-Nano/Using_the_SDRAM.pdf

This document below, shows how to program the EPCS of DE0-nanop

ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/17.0/Tutorials/DE0-Nano/Using_DE0-Nano_Flash.pdf

Thanks

  • RThie6's avatar
    RThie6
    Icon for New Contributor rankNew Contributor
    6 years ago

    Many thanks for your reply and links. I can perfectly run the program in SDRAM form the debugger (eclipse). I can perfectly make a bootable epcs64 system when nios is running from SRAM (and NOT SDRAM). It's the combination of getting it to boot from EPC and rund code/data from SDRAM that is the issue. I know the hardware boots from EPCS.. but for some reason the code isn't loaded into Sram or not booted... all parameters are set correct according to Intel manual... So problem persists