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Sivakumar_S's avatar
Sivakumar_S
Icon for New Contributor rankNew Contributor
2 years ago

AVST Booting of Arria 10 SoC using parallel flash connected to MAX10

Dear Ma'am/Sir, In our design we are using Arria 10 SoC, also we have max10 FPGA. Can I boot the configuration file from the parallel flash which is connected to the MAX 10 FPGA to the Arria 10 ...
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi,


The Avalon-ST configuration scheme (AVST) is the fastest configuration scheme for Intel Stratix 10 FPGA and on-wards, in which it replaces the FPP mode in previous device families.


So it is not supported in the Arria 10, you may compare the max data rate of the configuration schemes that are already availabe for Arria 10:

https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-guidance/configuration-support.html



p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.