Arria 10 SoC Development Kit: User I/O

There's a MAX II and a MAX V. The MAX II is for the USB Blaster hardware (page 42 in the schematic). The MAX V is the system controller that handles a whole bunch of functions (https://www.intel.com/content/www/us/en/docs/programmable/683227/current/max-v-cpld-5m2210-system-controller.html). SW3 connects to the MAX II, not the A10, and USER_PB_FPGA0 goes to the MAX V and gets basically passed through to the A10 since it's just a pushbutton.

You don't specify what error you're getting or any details on what you are trying to do or what is happening in the Pin Planner. Are you using a board example design that has all the I/O already set up for this board? If the pin is already assigned for use on the board, how would you assign it for something else without building a separate custom board?

I think more detail is needed here.