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nhadzic's avatar
nhadzic
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1 year ago

Apparent size limit for "User hardware1" image on Stratix 10 GX FPGA L-Tile board

I am using a Stratix 10 GX FPGA L-Tile board (DK-DEV-1SGX-L-A) and I am burning the binary image to the "User hardware1" section of the on-board flash. So far, the device utilization has been under 2...
Fpga Devkit
nhadzic's avatar
nhadzic
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10 months ago

Sorry about the delay.

I don't use .jic file. From what I can gather, .jic file is used for EPCS configuration devices and Stratix 10 GX board uses twp 1Gbit parallel NOR flash devices (PC28FFLxAxSxPH30B85).

- Generate SOF using Quartus Pro

- Convert SOF to POF

- Extract binary from the POF using the example found in the board download package: "examples\board_update_portal\ES\board_update_portal.zip\board_update_portal\build_hw.sh"

File is good, address is good but the resulting binary is larger than the space allocated in HW "User hardware1" space. When that happens, FPGA will not configure successfully from flash. If the image is smaller then everything works fine.

Is using .jic files the official way to burn images on this board? If so, can you please point me to the documentation on how to do it?

Also, what is the purpose of "User hardware 2" space? Is that an overflow for images that do not fit in "User hardware 1" space? There are not details about this space in the board manual or any DIP switches that would let me boot from that space.