Forum Discussion

Dorroon's avatar
Dorroon
Icon for New Contributor rankNew Contributor
1 year ago

Agilex 7 FPGA I-Series Transceiver-Soc Development Kit User_Led Pins assignment

Hello, I´m currently introducing myself in the use of this FPGA and i was interested in turning on one of the User_Leds with a simple verilog file using 'Quartus Prime Pro'. In the Schematic File, th...
Fpga Devkit
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
1 year ago

You have to perform at least Analysis & Elaboration from the Processing menu in Quartus to be able to make pin assignments in the Pin Planner. Once you do that, the top-level I/O from your design will appear in the All Pins list at the bottom of the Pin Planner allowing you to create location assignments to the appropriate I/O pin.

  • Dorroon's avatar
    Dorroon
    Icon for New Contributor rankNew Contributor
    1 year ago

    Hello sstrell,

    Thank you very much for your reply, the project has no issues compilating and has completed both Analysis & Elaboration processes so it is possible to make pin assignments in the Pin Planner. I was referring to the actual Pin number of these User_Leds that need to be written in the "Location" Section of the specific I/O in order to assign these with their corresponding Pin.

    I hope these screenshots will show better what i´m saying. The "Schematic" image shows the Pin number that refers to USER_LED3 (B3), but when i try to put this Pin number as the location of my Output 'Led' ("PinPlanner1" image) an error message appears ("PinPlanner2" image) and this happens with the rest of the USER_LEDs and their corresponding Pin number(USER_LED0, USER_LED1, etc...). So i´m not sure if these Pin numbers are the right ones for these LEDs.

    Thanks again, your help is much appreciated