5M80ZE64I5N I/O

Hi,

I think for Question 1, the technology defined by the I/O supply voltage (VCCIO) and the associate input and output voltage levels which is VIH, VIL, VOH and VOL. Each I/O standards is designed to be compatible with certain voltage levels and electrical characteristics to ensure proper communication between devices. For example, 3.3V LVCMOS have the maximum 4.0V for the logic high input voltage and minimum 1.7V to be recognized as input high. Else, for the input low, they need 0.8V for the maximum and -0.5V as minimum voltage level to be recognized as input low. This I/O standards must be supply with minimum 3.0V and maximum 3.6V to be able behave correctly.

For Question 2, I seem not found the VCCTRGT pin that you mentioned. Can you help to clarify back on this? I give you the pin connection guidelines for Max V device from below link:

https://www.intel.com/content/www/us/en/content-details/654129/max-v-device-family-pin-connection-guidelines.html?wapkw=max%20v%20pin%20connection&DocID=654129

Regards,

Aqid