New Contributor
Frequent ContributorYou can develop your own design from scratch in the traditional way without the blue and green region and instantiate all the IPs manually and so on, but apart from the fact that that is going to require a huge amount of time and effort, you will not be able to use Intel's software stack on such design either and you will have to develop your own software stack, too. Moreover, it might be very much possible that the Ethernet IP provided by Intel does not guarantee 100% line speed with minimum IFM and you might either have to buy an Ethernet IP from a third-party or develop one yourself. I doubt you would be able to modify Intel's Ethernet IP anyway, since these IPs are typically encrypted. I personally had experience with Xilinx's 1 GbE Ethernet IP some years ago and I encountered the exact same issue you are encountering here: as soon as I tried to test at full 1 Gbps with Spirent Test Center, I got a few dropped packets but there were no dropped packets at 99.99% and lower speeds.
New ContributorThanks for your reply.
I don't want to modify the IP. because, the IP is the domain of the manufacturer , not my domain.
Most of the freely available IP is provided by the manufacturer for easy use by users using the resource(PLL, Transceiver, IO, Block Memory, ...) included in the chip as hardware in the FPGA.
When IP is generated, RTL Code designed to meet a specific purpose using small resources are generated together.
The generated RTL Code can be partially modified and applied with compile.
I have been working on several communication related projects, but I have never had any experience with lack of line speed.
Maybe, This may be due to the fact that MAC is not a free IP, so only PHY (1GbE PHY or 10GbE XAUI, etc.) was used.
but, the blue area of the N3000 is very different from this.
The blue area consists of blocks created with IP and RTL codes using IPs.
This RTL Code support many options at compile time. the option is target(10GbE link or 40G link ....), using DMA, Included DDR4 , .....
As the structure changes according to many options and the internal memory map also changes.
In conclusion, I'm asking the manufacturer to check the blue area to see what the cause is.
I think, if it is a difficult part to fix, it is necessary to reflect this phenomenon when the manufacturer develops the next version.
