New Contributor
Frequent Contributor>I think, if setting IFG (Inter-Frame Gap) to 13 bytes, this is the same condition as lowering from 100% to 99.99% traffic in my test.
Yes, of course using an inter-frame gap of 13 bytes for testing means that you are not testing at full 10 Gbps.
Properly-made switches typically operate at a slightly higher clock than what is required to meet 10 Gbps to avoid packet drops caused by slight mismatch between the clock rate of the switch and connected devices. However, in the case of this FPGA board, the Ethernet IP likely operates at exactly the required clock or maybe even slightly less (e.g. 399.9999 MHz instead of 400.0 MHz), resulting in a few packets being dropped when operating at full speed with minimum inter-frame gap.
New ContributorThe summary of the reply to my question is as follows.
The facts of the conversation above is
1. N3000 board does not support 100% Wired-Speed.
The reason is that the clock used by Intel Ethernet IP is the same or slightly lower than the clock required.
However, it is only true in 10G x 8 Mode, and other 40G Mode is not tested and cannot be guaranteed.
2. Intel has no plans to modify and supplement Intel Ethernet IP to support 100% Wired-Speed.
In conclusion.
The N3000 board cannot be used for projects requiring 100% Wired-Speed.
Is the above correct?
