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User1588414328403410's avatar
User1588414328403410
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5 years ago
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Which FPGA board should I choose if I want to manipulate SSD with FPGA and OpenCL? How many boards do I need to manipulate at least 10TB of SSD?

Our team is working on simulating a piece of rat brain, approximately 5,000,000 neurons and 500,000,000,000 synapses and we are planning to use FPGA and OpenCL to accelerate the simulation. However, ...
  • HRZ's avatar
    5 years ago

    Neither Intel nor Xilinx has any solution/board that would allow you to allocate OpenCL global memory in an SSD. There are a few Xilinx-based boards that support NVME drives, but you will just get a barebone IP with those boards that only implements the NVME protocol and is supposed to be used with Hardware Description Languages (Verilog, VHDL, etc.).

    A better solution for you will likely be out-of-core processing. Intel provides a host channel extension for OpenCL which allows data to be directly streamed from the host to the FPGA, bypassing the FPGA DDR memory; however, I do not know of any boards other than Intel's reference boards (a10gx and s10gx) that support this extensions, and these reference boards are typically not very useful for production-level development due to their small on-board memory size. Moreover, this extensions is only applicable if your computation can be fully described in a streaming manner. A more general solution for you would be to split your data on the SSD into multiple chunks that are smaller than the FPGA on-board memory size and implement double-buffering on the DDR memory were you move one chunk of data to the DDR memory and while that chunk is being processed by the FPGA, you move another chunk to the DDR memory from the host and as soon as the first chunk is computed, you swap the buffers and continue doing this until the whole data set on the SSD is processed; this is not very difficult to implement using OpenCL. There is a very large body of work on out-of-core processing using GPUs which you can refer to, to get some ideas.