New Contributor
New ContributorHello,
I believe this is some problem with the 20.3 version you can try the following options for a temporary workaround for this issue
20.3 / Ubuntu 18.04.5 with default Gnome3 Desktop with english language & regional format settings : no SIN Internal error anymore
20.3 / Ubuntu 18.04.5 with KDE Plasma Desktop with english language but german regional format settings : no SIN Internal error
20.3 / Ubuntu 18.04.5 with default Gnome3 Desktop with english language but german regional format settings : = SIN Internal error
You can also try to change the Regional Format to English (US), then programming the image into FLASH. Hope this helps.
New ContributorWhat is up with Intel and its support. I have a similar problem. These boards costs several thousands of dollars plus the cost of the toolsets. Can we get a response please...
D:\Users\RM\Documents\Development\IntelFPGA\tests\hello_world>aoc device\hello_world.cl -o bin\hello_world.aocx -board=s10_sh2e1_4Gx2 -v
aoc: Environment checks completed successfully.
Quartus location: D:/intelFPGA_pro/20.3/quartus/bin64/quartus_sh.EXE
aoc: Cached files in C:\Users\Dell\AppData\Local\aocl may be used to reduce compilation time
You are now compiling the full flow!!
aoc: Selected target board package d:\intelFPGA_pro\20.3\hld\de10_pro
aoc: Selected target board s10_sh2e1_4Gx2
aoc: Running OpenCL parser....
aoc: OpenCL parser completed
aoc: Linking Object files....
aoc: Optimizing and doing static analysis of code...
aoc: Linking with IP library ...
aoc: Checking if memory usage is larger than 100%...
aoc: Memory usage is not above 100.
aoc: First stage compilation completed successfully.
aoc: Compiling for FPGA. This process may take several hours to complete. Prior to performing this compile, be sure to check the reports to ensure the design will meet your performance targets. If the reports indicate performance targets are not being met, code edits may be required. Please refer to the Intel FPGA SDK for OpenCL Best Practices Guide for information on performance tuning applications for FPGAs.
Error (37028): Cannot generate Atom Netlist File because family Stratix 10 is not installed
Error (37003): Can't generate Atom Netlist File for device family Stratix 10
Error (16546): Cannot load final database - ensure all earlier stages of the compiler have completed.
Error (37028): Cannot generate Atom Netlist File because family Stratix 10 is not installed
Error (37003): Can't generate Atom Netlist File for device family Stratix 10
Error (37028): Cannot generate Atom Netlist File because family Stratix 10 is not installed
Error (37003): Can't generate Atom Netlist File for device family Stratix 10
Error (37028): Cannot generate Atom Netlist File because family Stratix 10 is not installed
Error (37003): Can't generate Atom Netlist File for device family Stratix 10
Error (37028): Cannot generate Atom Netlist File because family Stratix 10 is not installed
Error (37003): Can't generate Atom Netlist File for device family Stratix 10
Error (17941): The design could not be loaded due to errors.
Error: design::import_design -file base.qdb -overwrite failed!
Error (23031): Evaluation of Tcl script d:/intelfpga_pro/20.3/quartus/common/tcl/internal/qatm_import_design.tcl unsuccessful
Error: Quartus Prime Compiler Database Interface was unsuccessful. 14 errors, 0 warnings
Error (23035): Tcl error:
Error (23031): Evaluation of Tcl script compile_script.tcl unsuccessful
Error: Quartus Prime Compiler Database Interface was unsuccessful. 2 errors, 0 warnings
For more details, full Quartus compile output can be found in files quartuserr.tmp and quartus_sh_compile.log.
Error: Compiler Error, not able to generate hardware
D:\Users\RM\Documents\Development\IntelFPGA\tests\hello_world>
Frequent Contributor@Quantitative_Finance The error messages in your log very clearly outline the source of the problem: you have not installed Startix 10 device support.
