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BBobb6's avatar
BBobb6
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5 years ago

Profiling, Software/Hardware Partitioning and Accelerating

Hi all, I am working on an open-source application written mainly in C++ and C. But mostly in C++. I have started using that application and then with the passage of time I had started profiling the...
AnilErinch_A_Intel's avatar
AnilErinch_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Hi,

Intel HLS can be very suitable in this case. Since you already know the computationally intensive points in your code, you can inspect what makes them computationally intensive and use HLS best practices like loop unrolling to mitigate them in the hardware. Already complex financial algorithms and workloads are running using HLS, also you have some reference to start with the examples coming along with HLS installation.

The reports of compilation will help you to see the result of optimizations performed.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/hls/archives/ug-hls-best-practices-17-1.pdf

For accelerating the application and to check out the performance boost you can access the PAC(Programmable Acceleration Card) from Intel FPGA DevCloud and try out before planning to use a custom board , as DevCloud have good resources to get you started.

https://github.com/intel/FPGA-Devcloud

Thanks and Regards

Anil