Multiple reflexive access from channel

Multiple channel call sites are now allowed in the compiler (since v17.1 I think), even though I would personally avoid them. However, I think the problem in your case is that you might have data circling in the chain of reads and writes in the merge_tree kernel, which, coupled with the fact that you also have multiple call sites per channel, makes the design impossible to implement on hardware. If you can avoid multiple call sites per channel altogether, that would likely fix the problem. However, as it is, it is difficult to pinpoint the problem considering the complexity of the channel operations. One point I can add is that you can probably use a struct to merge the two writes in lines 17 and 18, and the reads in 35 and 36, into one pair of write and read, and maybe even use a set of different channels for those altogether. As long as the channel depth is small (<16 indexes), you do not need to worry about the channel's area overhead since it will be implemented using registers (instead of Block RAM), and you can use as many channels as necessary to avoid reusing the same channel with multiple call sites.