New Contributor
New ContributorHello, thank you for your reply.
1) The OS version is Debian GNU/Linux 9 (stretch) 64-bit, and the kernel version is 4.9.0-12-amd64. The system has an Intel Core i7 CPU 920 and 24GB or RAM.
2) The HLS compiler is version 19.3 pro edition.
3) The compilation has no error messages. The compilation completes successfully and outputs a reports.html file with all the information about resource utilization, Initiation intervals etc. However, it has no information about
latency or memory arbitration, because the simulation has not yet run.
To compile the simulation I used the Makefile provided. For compilation I used:
i++ -march=Arria10 --fpc --fp-relaxed -o test-fpga (with the sources files included as well. I also tried Stratix10 which is my target platform. Also the compiler output a warning about the --fpc and --fp-relaxed flags, instructing me to replace them with -ffp-contract=fast and -ffp-reassoc, which i did. Nothing changed when I altered or completely removed the flags).
Regarding the Modelsim simulator, it is properly set up (I already used it in the previous examples of the tutorial, which were all working perfectly). I am not using the -ghdl flag in the case of the QRD, so no waveform files are generated.
However, when I run the simulation (both in the case of the QRD example in the tutorial and in the case of the project I am working now) there is no progress. No error messages are printed. In the case of the QRD, only output is the first input matrix, which is printed at the beginning of the testbench. No other output is printed, even after letting it run for hours. This indicates that the simulator is stuck somewhere.
My question regarding the waveforms was if there is some way of seeing the logging signals on-the-run (while the simulation is runing), rather than having to wait until it is finished, in order to be able to see if it gets stuck somewhere and why.
