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User1582192733150209's avatar
User1582192733150209
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

How can I know if e10_avl_st_gen.v and e10_avl_st_mon.v in filelist.txt be included in compilation of original vendor design example eth_e2e_e10?

Hello Sir/Madam,

I am running the original vendor design example eth_e2e_e10 on Intel PAC aria10gx.

I wonder the 2 design file e10_avl_st_gen.v and e10_avl_st_mon.v in filelist.txt were not included in the design compilation.

what I have done was

I open the Quartus GUI and open the /root/inteldevstack/a10_gx_pac_ias_1_2_pv/hw/samples/eth_e2e_e10/build_synth/build/dcp.qpf.

I could located the GEN and MON module in the hierarchy view of grren_bs, and found the relative design files been used in this project were in below location

/root/inteldevstack/a10_gx_pac_ias_1_2_pv/hw/samples/eth_e2e_e10/hw/rtl/e10/eth_traffic_controller/avalon_st_gen.v

/root/inteldevstack/a10_gx_pac_ias_1_2_pv/hw/samples/eth_e2e_e10/hw/rtl/e10/eth_traffic_controller/avalon_st_mon.v

I have check the comparing the design file between avalon_st_gen.v and e10_avl_st_gen.v, they are similar but not exactly same.

Could you tell me if e10_avl_st_gen.v and e10_avl_st_mon.v in filelist.txt be included in compilation of original vendor design example eth_e2e_e10? if not ,can we just remove them from filelist?

thanks

Jim

17 Replies

  • User1582192733150209's avatar
    User1582192733150209
    Icon for Occasional Contributor rankOccasional Contributor

    I have done that and foun e10_avl_st_gen.v and e10_avl_st_mon.v are not in the hirrachy and RTL view, taht is way I ask this question.

    thanks

    Jim

  • User1582192733150209's avatar
    User1582192733150209
    Icon for Occasional Contributor rankOccasional Contributor

    I have done that and foun e10_avl_st_gen.v and e10_avl_st_mon.v are neither in the hierachy , nor in RTL view, that is why I ask this question.

    thanks

    Jim

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi,

    After further checking and investigation, the e10_avl_st_gen and e10_avl_st_mon is for simulation purpose. while the avalon_st_gen and avalon_st_mon is for hardware implementation.

  • User1582192733150209's avatar
    User1582192733150209
    Icon for Occasional Contributor rankOccasional Contributor

    thanks for your help and support.

    if so, maybe we can remove them from filelist without influcing the whole implementation.

    Best regard

    Jim

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hi,

    You may remove it but if you need to performed simulation in the future then you will no longer able to performed it until you add it back.