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ManuelCostanzo2
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3 years ago

[Help] compiling my project for FPGA

Hi!

I'm working on my project: https://github.com/ManuelCostanzo/swsharp_sycl.

The folder there is "SYCL".

I have 3 Makefiles:
SYCL/Makefile

SYCL/swsharp/Makefile => build the library

SYCL/swsharpd/Makefile => buiid the program (that includes the library).

If you clone the repo and compile with "BACK=icpx make", it works perfectly. The problem is when I want to compile for FPGAs, for example: "BACK=fpga make", I'm getting errors.

I don't know if the correct way to compile the library and the program is how I'm doing. For example in the library (folder SYCL/swsharp) I added the following to the Makefile:


ifeq ($(BACK), fpga)
CP = icpx -fsycl -fintelfpga -Xshardware -Xstarget=/opt/intel/oneapi/intel_a10gx_pac:pac_a10 -v ../lib/libswsharp.a
CU = icpx -fsycl -fintelfpga -Xshardware -Xstarget=/opt/intel/oneapi/intel_a10gx_pac:pac_a10 -v ../lib/libswsharp.a
LD = icpx -fsycl -fintelfpga -Xshardware -Xstarget=/opt/intel/oneapi/intel_a10gx_pac:pac_a10 -v ../lib/libswsharp.a
endif
I'm using the fpga_compile node in DevCloud. At the end, the error I'm getting is:

******* Error: Assert failure at ../../../source/acl/llvm-project/llvm/lib/Target/FPGA/Griffin/XNodeUtil.cpp(182) *******
already connected this input (primWireOut -> extract_extract)! from: extract_extract_reg, to: outputBlk
allow_replacement || !toBlock->getPort(toPortName) || toBlock->getPort(toPortName)->getWire() == *wire FAILED
PLEASE submit a bug report to https://software.intel.com/en-us/support/priority-support and include the crash backtrace.
Stack dump:
0. Program arguments: /glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc -march=fpga -board /opt/intel/oneapi/intel_a10gx_pac/hardware/pac_a10/board_spec.xml -pass-remarks-input=pass-remarks.yaml -sycl -dbg-info-enabled swsharpdb.bc -o swsharpdb.v
1. Running pass 'DSDKGenerate Pipeline' on module 'swsharpdb.bc'.
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x27884af)[0x555da9bf44af]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x27853bd)[0x555da9bf13bd]
/lib/x86_64-linux-gnu/libpthread.so.0(+0x14420)[0x7f5e4b786420]
/lib/x86_64-linux-gnu/libc.so.6(gsignal+0xcb)[0x7f5e4789c00b]
/lib/x86_64-linux-gnu/libc.so.6(abort+0x12b)[0x7f5e4787b859]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x3f8857f)[0x555dab3f457f]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x3f89930)[0x555dab3f5930]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x3d99c20)[0x555dab205c20]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x3d83611)[0x555dab1ef611]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x3e26f9e)[0x555dab292f9e]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x3c371b7)[0x555dab0a31b7]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x3c250b9)[0x555dab0910b9]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x3c29a17)[0x555dab095a17]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x3c2aaf2)[0x555dab096af2]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x3c2e8ef)[0x555dab09a8ef]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0x2edcdb1)[0x555daa348db1]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(_ZN3acl25GriffinPipelineLegacyPass11runOnModuleERN4llvm6ModuleE+0xedc)[0x555daa34be8c]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(_ZN4llvm6legacy15PassManagerImpl3runERNS_6ModuleE+0x2fb)[0x555da9381ddb]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(+0xfa41d8)[0x555da84101d8]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(main+0x389)[0x555da82ddea9]
/lib/x86_64-linux-gnu/libc.so.6(__libc_start_main+0xf3)[0x7f5e4787d083]
/glob/development-tools/versions/oneapi/2023.0.1/oneapi/compiler/2023.0.0/linux/lib/oclfpga/llvm/aocl-bin/aocl-llc(_start+0x29)[0x555da8406059]
Aborted
Error: Verilog generator FAILED.
Refer to swsharpdb.prj/swsharpdb.log for details.

llvm-foreach:
icpx: error: fpga compiler command failed with exit code 1 (use -v to see invocation)
make[1]: *** [Makefile:90: swsharpdb] Error 1
make: *** [Makefile:56: swsharpdb] Error 2

Can you help me with this please? Feel free to clone and test the repo. Thank you very much, I'm very interested to try the FPGAs and oneAPI.