New Contributor
Frequent ContributorHello,
Before 18.0 we were using Qsys flow in system integrator and Qsys was doing the adaptation of the channel widths that came with decent performance as the described. However, this benefit from using Qsys was an unintended side-effect. The expectation was the data type matches up with the channel width. Of course, without the Qsys flow in 18.0 and after, the adaptation is no longer exist and the compile fails if the widths don’t match.
Unfortunately, the only workaround right now is to implement the width adaptation in your OpenCL code. That means not padding but instead buffering the smaller packets into one large one covering the entire channel width before writing and then reading every 2nd, 3rd, 4th, etc. cycle depending on what the width of the data type is. With that change, it should be similar to what you were getting in 17.1 with the Qsys flow.
Did you consider this approach?
Thank you.
Fawaz
New ContributorHi Fawaz,
we have been considering the suggested approach since the beginning.
From a functional point of view, it works.
But, this approach adds penalties in terms of performances: lower fmax and Occupancy%.
Thanks,
Paolo
