Mickleman
Occasional Contributor
5 years agoFPGA compile blocks all other development
Hi
FPGA compiles typically take 6 to 24 hours. During that time I obviously wish to continue testing previous versions and developing new ones using the quick report level compiles.
As of today neither of these is possible until the background compile has finished - I simply cannot access a second compile/run node. What do I need to do to be able to do this again?
Regards, Marcus