Forum Discussion
KennyT_altera
Super Contributor
4 years agoAdded back converted logic for you. Kindly take a look.
rohith1
New Contributor
4 years agoHey, thank you so much. I'm new to VHDL so I'm afraid I have some basic questions. First work.vhd_prim doest seem to compile. Work does not contain primary unit vhd_prim comes up. Second, when those lines are removed I get an error saying carry4 is used but not declared. What changes did you implement? Thank you so much for you help.
Rohith