Forum Discussion
Hi @dj-park;
Thank you for posting in Intel community forum and hope all is well.
If I understand your first question correctly, I would say the "fast_recompile.fpga" bitstream is more toward to be executed in the FPGA instead of configuring them, on top of that .fpga bitstream requires BSP which this fpga design generated from the compiler will than be included into the BSP framework. (which are different purposes from the .sof bitstream which are generally contain data for configuring the SRAM based intel devices)
As for the second part of the question, unfortunately there is no such use case available, hence no such command in quartus are available. In quartus itself there would be a different build flow are being utilize to generate the bitsteam which will than be be used to configured and run in the FPGA.
Hope that clarify.
Best Wishes
BB
Thanks for the reply.
... more toward to be executed in the FPGA instead of configuring them. ...
I am confused with the phrase above.
So, "fast_recompile.fpga" should definitely contain bitstream to program FPGA, right?
What do you mean by "executed", and how is it different from "configuring" FPGA?
For me, icpx command is a blackbox. I want to know exactly how .a image file is generated from Quartus, and what exactly happens with the command below.
icpx -fsycl -fintelfpga host.o dev_image.a -o fast_recompile.fpga