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NOTE: THIS SOLUTION DOES NOT WORK. CONTINUE READING THE THREAD FOR AN UPDATED CONCLUSION
Hi,
I can confirm that AGIB027R29A1E1VB works with oneAPI support when configured for PCIe Gen4 1x16 and a 2x8 memory subsystem.
oneAPI does not work with either of the PCIe Gen 5 configurations even though I can successfully build OFS FIMs without oneAPI support for both Gen 5 1x16 and Bifurcated Gen 5 2x8 PCIe. When I try to build the oneAPI ASP with PCIe Gen 5, I encounter one of the following errors:
- For Gen 5 1x16, the build fails due to a Verilog error in ofs-platform-afu-bbb
- For Bifurcated Gen 5 2x8, the build succeeds but aocl diagnose acl0 times out (DMA fail)
Here are the changes that I made to get OFS and oneAPI to work with my card:
- Follow the instructions to migrate to the AGIB027R29A1E1VB card: PCIe Attach I-Series (2xR-Tile, F-Tile) - OFS
- Remove the two South I/O Rows. Follow steps 1-4 from PCIe Attach I-Series (2xR-Tile, F-Tile) - OFS and then follow the removal steps from PCIe Attach F-Series (P-Tile/E-Tile) - OFS. The second set of instructions are for removing the HPS, which is not present in the mem_ss ip, but the steps for removing the two North banks are the same. I attached my preset for your reference.
- Configure PCIe for Gen4 1x16 by specifying pcie_gen = 4 under [settings] in pcie_host_1pf_1vf.ofss. I attached my ofss for your reference.
- (Optional) Refloorplan the PR region to recover resources that were used by the southern memory banks by following the steps here PCIe Attach I-Series (2xR-Tile, F-Tile) - OFS. I attached my pr_assignments.tcl for your reference.
- Build the FIM with ./ofs-common/scripts/common/syn/build_top.sh -p --ofss tools/ofss_config/pcie/pcie_host_1pf_1vf.ofss iseries-dk:null_he_lb,null_he_hssi,null_he_mem,null_he_mem_tg,no_hssi work_iseries-dk_minimal_fim
- Add a device model for AGIB027R29A1E1VB to $INTELFPGAOCLSDKROOT/share/models/dm. I attached mine for your reference.
- Modify oneAPI ASP board_spec.xml for a 2x8 memory subsystem by following the instructions here: oneAPI Accelerator Support Package(ASP) Reference Manual - OFS. Make sure the number of memory banks is 2, the maximum theoretical bandwidth is 42656 ((1333MHz x 2 x 64 bits / 8 bits) x 2 banks), the Quartus project settings points to the correct device model, and the FPGA resources for kernel region matches your PR region size. I attached my preset file for your reference.
- Set $OFS_ASP_ROOT appropriately and build the ASP by following the instructions here: oneAPI ASP Getting Started User Guide - OFS
- Program the FIM following the instructions here: OFS for Agilex® 7 FPGA I-Series Development Kit (2xR-Tile,1xF-Tile) - OFS. Do not skip the sudo pci_device <PCIe BDF> unplug step, otherwise your PCIe link speed may be downgraded.
- Initialize the board and run aocl diagnose acl0 following oneAPI ASP Getting Started User Guide - OFS
I am a student unaffiliated with Altera. Let me know if this works for you.
Best,
Jason
It seems like not all my attachments got posted. Let me know if you would like them or if I should share my entire repo.
- jjb1691 month ago
New Contributor
Hello,
Amazing, thank you so much!! I'll try following these steps next time I am at my workstation, as I am currently barred by lots of snow.
If you would be able to share your board model file, or just the entire repo as you offer for reference, that would be phenomenal. I am not deeply experienced with OFS, and much of this process is new to me, so I greatly appreciate your help.
Best,
James- jchecmu1 month ago
New Contributor
The board model file is nothing more than the total FPGA resources (ALMs, FFs, DSPs, M20Ks, etc). You can read more about it here oneAPI Accelerator Support Package(ASP) Reference Manual - OFS and look at the existing ones for reference.
I need some time to clean up the repo but will get to it when I can
For AGIB027R29A1E1VB, the resource counts are:
<alms num="912800"/>
<ffs num="3651200"/> <!-- 4xALMs, since there are 4 FFs per ALM. hyper-regs not counted -->
<dsps num="8528"/><!-- 27-bit elements -->
<rams num="13272"/><!-- M20Ks -->
<mlabs num="45640"/> <!-- half of total labs (10 ALMs each) -->
- jjb16916 days ago
New Contributor
Hello,
Thank you for the clarification! Sorry for the delay, I've been running into crashes during compilation that I think are memory related, so I'm currently waiting on a delivery of 128GB RAM.
On one run, however, I did encounter a compilation error as shown below, but I'm thinking it may be due to a mistake I made when modifying the mem_ss.ip as you listed in step 2.
Error (17045): Input port I of I/O input buffer primitive local_mem_wrapper|mem_ss_top|mem_ss_inst|mem_ss|hps_emif|hps_emif|arch|arch_inst|bufs_inst|gen_rzqin.ibuf is not connected. It must be driven by a top-level pin. File: /home/jbick/OFS/OFS_BUILD_ROOT/ofs-agx7-pcie-attach-slim/work_iseries-dk_minimal_fim/ipss/mem/qip/mem_ss/mem_ss/mem_ss_mem_ss_200_rod65uq/synth/ip/mem_ss_mem_ss_200_rod65uq/mem_ss_mem_ss_200_rod65uq_emif_0/altera_emif_arch_fm_191/synth/altera_emif_arch_fm_bufs.sv Line: 1138
Error: Failed to synthesize partition
Once my RAM is delivered and installed, I will try the process once more and report the results!
Thanks!
James