- 6 years ago1.3KViews0likes1Comment
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Can anyone verify for me the following code for 32-bit calculator in verilog using FSM? 4 operation- +,-,*,/ Works on DVS protocol
6 years ago1.8KViews0likes1Comment- 6 years ago2.1KViews0likes1Comment
I try to connect HPS with FPGA part in SOC_DE1 but I get this error I wonder if you could please help with that?
6 years ago2.1KViews0likes3Comments