Most Recentquartus 20.2 can not start modelsimQuartus Prime Lite 20.1 reports a compile error on valid systemverilog generate block syntaxbblpt service won't startsignal from input pin to output pin invertedLoan IO for UART doesn't work in QPSWhat is the ECCN of these 3 FPGA models 1SG085HN3F43E2VG， 1SG065HH3F35E2VG and 1SG040HH3F35E2VGAdd search path to IP catalog from cmdlineLoop unrolling doesn't improve the processing time of radix-4 butterflyCannot download Quartus 13.1 & SoC EDS 13.1Quartus 20.1 timing analysis takes time
