Most RecentError when running pin_assignment tcl scriptUsing Serial Flash Loader IP and ASMI Parallel II IP (Error (176286): Found 2 SPI blocks in design ...)I have a customer experiencing this problem with the JESD204B IP:NIOS hanging when reading a register from JESD204B corePairing GTH Transceivers with QSFP range extenderCalibration failing for DDR2 Memory Controller on Cyclone VAltsyncram mixed port width issueI'm doing a Modelsim simulation with the Arria 10 EMIF DDR4. Using the IP generated testbench. The abstract PHY option is relative fast, using the DDR4 memory model is painfully slow.How do I create a Arria 10 SerialLite II IP in Quartus 17?I want to simulate cascaded PLLs but questa sim reports Module 'arriav_ffpll_reconfig' is not defined. I cannot find the (library) file that contains this component. Where can I find it?
