Most RecentQuartus Prime Pro 19.3 waveform simulationshuge delay inserted by Quartus 19.3 pro on the Arria 10 FPGANeed to know life cycle status:Using Altera reserved I/O pins by an Altera IPpac n3000 8x10G failed to connect with 40G server net card with 1x40G optical module and fiberHi, For Transceiver IO's do we need to match trace length for multiple channels/lanes for 40GB Ethernet using QSFP+ connector ?is it possible to use an intel xeon e3 1220 v2 on a motherboard with chipset q65 ??I have trouble with demo THDB-ADA boardCan't read data from Arria10 ,PCIe Gen1 x1 or x4 example design share
