Most RecentHi, My customer has some DDR questions about S10 DX DK as below. we cannot find in any documents. Please help，thank you！Hello. Any verilog example to write-read-erase(previous write location)-write back(the erase location)-read back to MAX10 UFM flash memory ? Able to write and read back but stuck at erase and write back and read back ?Board description files and examples for developing for Intel PAC D5005 with Quartus Prime ProSignalTap -> default Triggering ConditionsWhat does the parallel interface between the onboard USB-Blaster and the FPGA do?issue with A10 GSRD v17.1 (A10 SOC FPGA) Error "couldn't calibrate SDRAM"Hi I need to draw a picture with the NIOS II on the DE 10 Nano Board through HDMI onto an ordanary screen. Has someone an idea how to communicate with the HDMI interface ?working with cyclone 2 starter kit, can't create nios2 processor with quartus13.0sp1Is there a license free transceiver PHY for Arria10 GX?I'm trying to create a jic file for the CycloneV SOC dev kit. The 'Convert Programming File' doesn't have the correct device available.
