Rahul_S_Intel1Frequent ContributorJoined 7 years ago622 Posts12 LikesLikes received17 SolutionsView All Badges
ContributionsMost RecentMost LikesSolutionsRe: PCIE Gen4x16 example design Hi , The information avaialble for the above is from the below user guide . https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-dex-ptile-pcie-avst.pdf Kindly requesting to refer the UG Re: PCIe ip核,点击"generate example design"生成的tcl使用时报错; From my side , example design is working Re: Not able modify testbench BFM Intel P tile PCIE avmm example design on Stratix 10DX device Hi Indira Priya , Kindly find page no: 5 of the below document https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-dex-ptile-pcie-avmm.pdf Re: Arria 10/Stratix 10 PCIe SR-IOV DMA The only information available is from the UG : https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_s10_pcie_avst.pdf Re: PCIE gen4x16 example design with BFM Hi , This issue have to look in depth , actually repoted internally waiting for the input . Mean time can you pls help me to try the simulation on model sim Re: S-10 Transceiver IO Terminations Hi , Can you please try on pin planner Re: PCIe Avalon-MM DMA MSIs assignment of AN829 Hi , Kindly find the details of the MSI interrupt on page no: 97 https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_avmm.pdf for detailed description Re: PCIE gen4x16 example design with BFM May I know is it default, example design or any modification you guys have made Re: Driver Code for DMA with PCIe Hard IP on Cyclone 10 GX dev board There is a driver code is available during the generate example design , you can make use of it Re: Arria 10 PCIe Hard IP Automatic Lane Polarity Inversion I gone through the Errata and the details, from the below , I assume you are planning to use PCIe gen3 x8, in that case, the below Errata does not apply , And I am curious why you have to use CVP ,is there any particular reason ( only need to achieve PCIe 100ms time ) The above question is to understand the issue more Or are you expecting me to provide the worst case analysis? on a perticular scenario